The increasing complexity of integrated circuits, the growing number of metal levels and the focus on increasing speed of these circuits have created demands for low permittivity materials, particularly for use as inter-metal layers, i.e., used to isolate two metal levels from one another, or intra-metal layers, i.e., used to isolate metal patterns possibly formed within the same metal level one from another. Conventionally, metal interconnects, mostly aluminum layers, with silicon dioxide as a dielectric are used, but this conventional solution will not be able to meet the stringent specifications resulting from the above mentioned trends. Therefore, to avoid a large portion of the total circuit delay caused by the resistance and, particularly, the capacitance of the interconnect system, it is desirable to reduce the permittivity of the dielectric used. This is stated in numerous publications, e.g., in Table 1 of R. K. Laxman, “Low ε dielectric: CVD Fluorinated Silicon Dioxides”, Semiconductor International, May 1995, pp. 71–74. A low ε material, a low K material and a material with a low permittivity are all alternative expressions for a material with a low dielectric constant, at least for the purposes of this disclosure. Therefore, miniaturization has lead to an intensified search for new low K materials. The most desirable material should have a low K value, low mechanical stress, high thermal stability and low moisture absorption. Furthermore, the desire material should be selected based on the compatibility with state-of-the-art semiconductor processing steps and tools.
Part of the search for new low K materials was directed to changing the properties of silicon dioxide as deposited. Deposited silicon dioxide is the most widely used dielectric inter- or intra-metal material having a K value of about 3.9. Several publications have indicated that the K value of silicon dioxide films can be reduced by introducing increasing amounts of fluorine in said films. A wide variety of processes to deposit fluorinated silicon oxide films are known, like, e.g., Plasma Enhanced Chemical Vapor Deposition (PECVD) process as in the U.S. Pat. No. 5,641,581. Using these processes K values in the range between 3 and 3.5 are reported to be dependant on the amount of fluorine atoms incorporated, i.e., an increasing amount of fluorine leads to a decrease in the K value.
Besides the focus on changing the properties of silicon oxide, there is an ongoing search for new low K materials amongst others because a K value of 3 is still too high. These new materials can be divided roughly in two groups: the inorganic low-K materials and the organic low-K materials. The inorganic low-K materials have mostly interesting K values below 2 or even below 1.5 like, e.g., xerogels, but these materials are mostly not compatible with the fabrication process of integrated circuits. The organic low-K materials, especially the organic spin-on materials, however, have a K-value typically in the range from 2.5 to 3. These organic materials are of particular interest because they feature simplified processing, excellent gap-fill and planarization.
The benefits of using such organic low-K spin-on materials are partly nullified by the need to introduce an inorganic hard mask layer for the patterning of an organic low-K spin-on material. For the purpose of this disclosure, a hard mask layer is defined as a layer which can be etched selectively to another layer and which therefore can be used as an etch mask to etch said other layer. Traditional lithographic resists are not suited to be used as hard mask layers for patterning organic low-K spin-on materials because these resists are also based on organic polymers resulting in an insufficient etch selectivity with regard to the organic low-K spin-on material. Conventionally, inorganic hard mask layers like silicon oxide or silicon nitride layer are used as described in, e.g., M. Schier, “RIE of BCB using a silicon nitride dielectric etch mask”, J. Electrochem. Soc., v. 142, n9, p. 3238, 1995 and E. A. Lagendijk, et al., MRS Symp. Proc., v. 443, p. 177, 1997. These conventional inorganic hard mask layers have a rather high K value, i.e., typically in the range of 3.9 and above, which makes them less suitable for interconnect or isolation structures wherein the hard mask layers cannot be removed. Examples of such structures are damascene structures, where the hard mask layer can be positioned in-between two dielectric layers. If these dielectric layers are low-K organic layers part of the benefit of using such low-K layers is nullified because the K value of the inorganic hard mask layer contributes significantly to the mean value of the K value of the total dielectric stack comprising the hard mask layer and the two low K layers.